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I think that I have found my own answer. I have the timer set up for external asynchronous input and the data sheet says that compare is not guaranteed with the asynchronous counter.

Doh. How man ...

I understand what the compiler is doing when the interrupt occurs. What I don't understand is the relevance of the 32KHz period to what I am doing.

I am not resetting timer1 or adjusting it in any ...

Well after typing a lot of stuff carefully explaining to you that you don't know what you are talking about, it finally occured to me that I didn't know what you were talking about.

My interrupt co ...

I am running at 20 MHz. So the interrupt routine takes a very minor fraction of the period.

I am trying to use CCP2 to generate an interrupt every 125 ms (based on a 32KHz clock on Timer 1). To do this I incrementing the compare register with a fixed value (4016 -> 125 ms of 32 KHz pulse ...