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gjs_rsdi
Joined: 06 Feb 2006
Posts: 468
Location: Bali
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| Enabling PLL on 16F1847 - SOLVED |
 Posted: Mon Apr 25, 2016 8:34 pm |
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Hi
Trying to enable PLL on 16F1847 but in the configuration PLL not enabled.
The MPLAB is in the RELEASE mode (learned to do that).
I suppose I am doing something wrong, can't realize what.
I have set as below, tried many other options, no one get enabled:
| Code: |
#FUSES INTRC_IO,PLL
#use delay(clock=32000000,internal=8000000,restart_wdt) |
in the main:
| Code: | | setup_oscillator(OSC_8MHZ|OSC_PLL_ON); |
Best wishes
Joe
Last edited by gjs_rsdi on Tue Apr 26, 2016 8:35 pm; edited 1 time in total |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Mon Apr 25, 2016 9:29 pm |
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Actually you do it as simply as possible. Just tell the compiler you want
an internal clock of 32 MHz in the #use delay() statement:
| Code: |
#include <16F1847.h>
#fuses NOWDT
#use delay(internal=32M)
//==========================
void main()
{
while(TRUE);
} |
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gjs_rsdi
Joined: 06 Feb 2006
Posts: 468
Location: Bali
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| Posted: Mon Apr 25, 2016 10:17 pm |
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Hi PCM programmer, thank you for the answer
I changed the line to:
| Code: | #use delay(internal=32M)
//#use delay(clock=32000000,internal=8000000,restart_wdt)
//#FUSES INTRC_IO |
main
// setup_oscillator(OSC_8MHZ|OSC_PLL_ON);
Still 4x PLL disabled
Best wishes
Joe |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Mon Apr 25, 2016 10:20 pm |
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| What's your compiler version ? I'll check it in hardware. |
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gjs_rsdi
Joined: 06 Feb 2006
Posts: 468
Location: Bali
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| Posted: Mon Apr 25, 2016 10:29 pm |
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It is the demo version:
CCS PCM C Compiler, Version 5.056d, 1
26-Apr-16 12:09 |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Mon Apr 25, 2016 11:12 pm |
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I installed vs. 5.056 (not the demo, the command line compiler).
I compiled the file (with MPLAB vs. 8.92) and programmed it with
a Pickit 3.
I'm using an 16LF1847, running at 3.3v. I couldn't find my non-LF
16F1847, but I think it's going to behave the same, in terms of making
a blinking LED program work.
Anyway, the following program blinks an LED once per second.
Change the LF to an F for your test. It should work. If it doesn't work,
what does it do ?
You said this:
| Quote: | | Still 4x PLL disabled |
How do you know it's disabled ?
| Code: | #include <16LF1847.h>
#fuses NOWDT
#use delay(internal=32M)
//==========================
void main()
{
while(TRUE)
{
output_toggle(PIN_B0);
delay_ms(500);
}
} |
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gjs_rsdi
Joined: 06 Feb 2006
Posts: 468
Location: Bali
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| Posted: Tue Apr 26, 2016 12:15 am |
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Thank you PCM programmer
After compiling (MPLAB in RELEASE) I am checking the Configuration Bits, all as I want except:
PLLEN - PLL Enable - 4x PLL disabled
I will make a led to blink then will implement in my program.
I still want to ask if no need in main the:
| Code: | | setup_oscillator(OSC_8MHZ|OSC_PLL_ON); |
and the line:
| Code: | #FUSES INTRC_IO//using RA6 as IO
#FUSES PLL |
Will be back with the results |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19537
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| Posted: Tue Apr 26, 2016 1:01 am |
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Take a deep breath!....
Use the code as PCM_programmer posts.
This will _not_ enable the PLL fuse. It instead turns on the PLL just after the chip boots.
This is done, because there is an erratum on a couple of other closely related chips, which will not boot in RC mode if the PLL fuse is enabled. Though this has not (apparently yet) given problems in the 47, CCS decided (wisely) to automatically apply the same fix.
So the code will always set the PLL to 'PLL_SW' (software controlled PLL), and enable it as soon as the code starts.
Test the speed. The code does run at 32MHz.
If it doesn't with your compiler, moan to CCS. The full 5.056 version does it correctly, and the d version should be using the same code. |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Tue Apr 26, 2016 1:04 am |
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That doesn't mean anything. We're using software PLL enable.
The hardware PLL fuse isn't used. It's disabled.
The 16F1847 data sheet says the following:
| Quote: | 5.2.1.4 4xPLL
The 4xPLL may be enabled for use by one of two methods:
1. Program the PLLEN bit in Configuration Words
to a ‘1’.
2. Write the SPLLEN bit in the OSCCON register to
a ‘1’. If the PLLEN bit in Configuration Words is
programmed to a ‘1’, then the value of SPLLEN
is ignored. |
We are doing method #2. |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19537
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| Posted: Tue Apr 26, 2016 1:09 am |
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I know PCM.
The point is I think he wants to see the fuse set.
Look at what he says:
"I am checking the Configuration Bits, all as I want except:
PLLEN - PLL Enable - 4x PLL disabled ".
That's why I told him to:
"Test the speed. The code does run at 32MHz." |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Tue Apr 26, 2016 2:08 am |
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I wasn't posting to you. I was posting to him. 
I didn't see your post until just now. |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19537
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| Posted: Tue Apr 26, 2016 2:28 am |
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Ah ha!.... 
Makes total sense then. It looked so like a reply to my post.
It's also worth emphasising the 'why'. This is the only one I've seen of these recent chips that either doesn't say in the data sheet 'not' to enable the PLL fuse when using the internal RC, or doesn't have an erratum about it.
It may well be that it does work OK, but 'why risk it'?.... |
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gjs_rsdi
Joined: 06 Feb 2006
Posts: 468
Location: Bali
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| Posted: Tue Apr 26, 2016 7:03 am |
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Like always, PCM programmer is right
As an old man, used to assembler, it is weird not to have the things as should be (theoretically)
I am still struggling to understand why, but all all my program works as it should work 
Trying to test the serial communication but I have some problem with the hardware, testing with 16F648A that was working already.
I was suspicious also that don't have any "ERATA" yet for this chip.
Any how, enjoying very much the new compiler, maybe don't need to keep my old Version 3.249
Thank you again PCM programmer and Ttelmah
Appreciate very much your help
Joe |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19537
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| Posted: Tue Apr 26, 2016 9:19 am |
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The 'why' is simple. When you select Internal=32MHz, the compiler 'knows' this means 8MHz + PLL.
It sets the internal oscillator up to give 8MHz, and then at the very start of the code it adds the line to enable the SWPLL bit.
Fifty or more compiler versions ago, when this was selected, they instead enabled the hardware PLL bit in the fuses. There were then about three chips launched that all had problems when this was done. So now CCS treats the software enable as the 'better' way to do things.
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gjs_rsdi
Joined: 06 Feb 2006
Posts: 468
Location: Bali
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| Posted: Tue Apr 26, 2016 3:51 pm |
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Thanks for the answer Ttelmah
Still I would like that:
"PLLEN - PLL Enable - 4x PLL disabled"
will be:
"PLLEN - PLL Enable - 4x PLL enabled"
Best wishes
Joe
Edited
PS: How can add to the topic name "SOLVED"? |
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