18F452 Hardware I2C Problem

[keith lockstone]

During a read operation to an I2C EEPROM we found the restart wasn't working correctly. We substituted a call to the following routine for the second I2C_start() with good results:

#BYTE SSPCON2 = 0xFC5
#DEFINE RSEN 0x02

void I2C_restart(void) // restart of I2C transfer
{ SSPCON2 |= RSEN; // restart
while (SSPCON2 & RSEN) ; // wait until bit cleared
}

CCS Please note!
___________________________
This message was ported from CCS's old forum
Original Post ID: 8109

[Tomi]

You didn't tell the version number but 3.112 looks good.
Note that there is no separate function to the i2c_restart in CCS C. The common i2c_start() is executed as a repeated start if the i2c session is already opened (in other words, during the second i2c_start() before the terminating i2c_stop()).
Here is the list part:

Source:
i2c_start();
i2c_write(0xA0);
i2c_write(0x00);
i2c_write(0x00);
i2c_start();
mit = i2c_read();
i2c_stop();

List:
.................... i2c_start();
006C: BCF PIR2.3
006D: BCF SSPCON.7
006E: BSF STATUS.5
006F: BSF SSPCON2.0 // set START bit
0070: BCF STATUS.5 // the other lines are for MM Mode
0071: BTFSC PIR2.3
0072: GOTO 06C
0073: BTFSC SSPCON.7
0074: GOTO 06C
0075: BSF STATUS.5
0076: BTFSC SSPCON2.0
0077: GOTO 076
.................... i2c_write(0xA0);
0078: MOVLW A0
0079: BCF STATUS.5
............... // other writes
.................... i2c_start();
0080: BCF PIR1.3
0081: BSF STATUS.5
0082: BSF SSPCON2.1 // here is the repeated start
0083: BTFSC SSPCON2.1 // same wait cycle as yours
0084: GOTO 083 // wait for done

Not sure, but do you have that i2c_start() calls in different functions?

:=During a read operation to an I2C EEPROM we found the restart wasn't working correctly. We substituted a call to the following routine for the second I2C_start() with good results:
:=
:=#BYTE SSPCON2 = 0xFC5
:=#DEFINE RSEN 0x02
:=
:=void I2C_restart(void) // restart of I2C transfer
:={ SSPCON2 |= RSEN; // restart
:= while (SSPCON2 & RSEN) ; // wait until bit cleared
:=}
:=
:=CCS Please note!
___________________________
This message was ported from CCS's old forum
Original Post ID: 8117

[keith lockstone]

We went from ver. 3.110 to 3.116 to try and fix the problem without success. On a scope we saw both SDA and SCK go high simultaneously at the second i2c_start() then SCK went low, high, low before SDA went low. The following i2c_read() was rejected by the memory chip. The analysis was hindered by #LIST not working on the earlier issue.


:=You didn't tell the version number but 3.112 looks good.
:=Note that there is no separate function to the i2c_restart in CCS C. The common i2c_start() is executed as a repeated start if the i2c session is already opened (in other words, during the second i2c_start() before the terminating i2c_stop()).
:=Here is the list part:
:=
:=Source:
:=i2c_start();
:=i2c_write(0xA0);
:=i2c_write(0x00);
:=i2c_write(0x00);
:=i2c_start();
:=mit = i2c_read();
:=i2c_stop();
:=
:=List:
:=.................... i2c_start();
:=006C: BCF PIR2.3
:=006D: BCF SSPCON.7
:=006E: BSF STATUS.5
:=006F: BSF SSPCON2.0 // set START bit
:=0070: BCF STATUS.5 // the other lines are for MM Mode
:=0071: BTFSC PIR2.3
:=0072: GOTO 06C
:=0073: BTFSC SSPCON.7
:=0074: GOTO 06C
:=0075: BSF STATUS.5
:=0076: BTFSC SSPCON2.0
:=0077: GOTO 076
:=.................... i2c_write(0xA0);
:=0078: MOVLW A0
:=0079: BCF STATUS.5
:=............... // other writes
:=.................... i2c_start();
:=0080: BCF PIR1.3
:=0081: BSF STATUS.5
:=0082: BSF SSPCON2.1 // here is the repeated start
:=0083: BTFSC SSPCON2.1 // same wait cycle as yours
:=0084: GOTO 083 // wait for done
:=
:=Not sure, but do you have that i2c_start() calls in different functions?
:=
:=:=During a read operation to an I2C EEPROM we found the restart wasn't working correctly. We substituted a call to the following routine for the second I2C_start() with good results:
:=:=
:=:=#BYTE SSPCON2 = 0xFC5
:=:=#DEFINE RSEN 0x02
:=:=
:=:=void I2C_restart(void) // restart of I2C transfer
:=:={ SSPCON2 |= RSEN; // restart
:=:= while (SSPCON2 & RSEN) ; // wait until bit cleared
:=:=}
:=:=
:=:=CCS Please note!
___________________________
This message was ported from CCS's old forum
Original Post ID: 8175

[Mark]

In your code, you forgot to address the eeprom in read mode. The LSB should be a 1. Something like this:

i2c_start();
i2c_write(0xa0);
i2c_write(address);
i2c_start();
i2c_write(0xa1);
data=i2c_read(0);
i2c_stop();

Regards,
Mark
:=We went from ver. 3.110 to 3.116 to try and fix the problem without success. On a scope we saw both SDA and SCK go high simultaneously at the second i2c_start() then SCK went low, high, low before SDA went low. The following i2c_read() was rejected by the memory chip. The analysis was hindered by #LIST not working on the earlier issue.
:=
:=
:=:=You didn't tell the version number but 3.112 looks good.
:=:=Note that there is no separate function to the i2c_restart in CCS C. The common i2c_start() is executed as a repeated start if the i2c session is already opened (in other words, during the second i2c_start() before the terminating i2c_stop()).
:=:=Here is the list part:
:=:=
:=:=Source:
:=:=i2c_start();
:=:=i2c_write(0xA0);
:=:=i2c_write(0x00);
:=:=i2c_write(0x00);
:=:=i2c_start();
:=:=mit = i2c_read();
:=:=i2c_stop();
:=:=
:=:=List:
:=:=.................... i2c_start();
:=:=006C: BCF PIR2.3
:=:=006D: BCF SSPCON.7
:=:=006E: BSF STATUS.5
:=:=006F: BSF SSPCON2.0 // set START bit
:=:=0070: BCF STATUS.5 // the other lines are for MM Mode
:=:=0071: BTFSC PIR2.3
:=:=0072: GOTO 06C
:=:=0073: BTFSC SSPCON.7
:=:=0074: GOTO 06C
:=:=0075: BSF STATUS.5
:=:=0076: BTFSC SSPCON2.0
:=:=0077: GOTO 076
:=:=.................... i2c_write(0xA0);
:=:=0078: MOVLW A0
:=:=0079: BCF STATUS.5
:=:=............... // other writes
:=:=.................... i2c_start();
:=:=0080: BCF PIR1.3
:=:=0081: BSF STATUS.5
:=:=0082: BSF SSPCON2.1 // here is the repeated start
:=:=0083: BTFSC SSPCON2.1 // same wait cycle as yours
:=:=0084: GOTO 083 // wait for done
:=:=
:=:=Not sure, but do you have that i2c_start() calls in different functions?
:=:=
:=:=:=During a read operation to an I2C EEPROM we found the restart wasn't working correctly. We substituted a call to the following routine for the second I2C_start() with good results:
:=:=:=
:=:=:=#BYTE SSPCON2 = 0xFC5
:=:=:=#DEFINE RSEN 0x02
:=:=:=
:=:=:=void I2C_restart(void) // restart of I2C transfer
:=:=:={ SSPCON2 |= RSEN; // restart
:=:=:= while (SSPCON2 & RSEN) ; // wait until bit cleared
:=:=:=}
:=:=:=
:=:=:=CCS Please note!
___________________________
This message was ported from CCS's old forum
Original Post ID: 8190