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Pulse train converted to logic level output

 
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crystal_lattice



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Pulse train converted to logic level output
PostPosted: Fri Dec 12, 2008 10:47 am     Reply with quote

I know this is not CCS related (yet) but was wondering if I could pic some brains. I am busy with an infra red beam system which will detect beam breakage in one direction only - uses two beams and D flip-flop.

Problem is: the IR is modulated at 38KHz, thus the output signals (after the whole op-amp detection stage) going to the D flip-flop input is also pulsing @38KHz (50% duty cycle, but will be reduced to about 10% later) thus I want to convert the pulse train to a steady logic level output if it is present.

This can be done with some fancy electronics/pic micro but I'm tryng to do it with some other means to try and keep cost low and enable the use of smaller micro. My current idea is to use some capacitor circuit and charge the cap when carrier is present, else it will discharge and thus give logic low.

Any other/better ideas would be greatly appreciated
asmallri



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PostPosted: Fri Dec 12, 2008 12:15 pm     Reply with quote

If I have understood this correctly, you will be using a micro anyway and you will be signal the micro if the beam is present or not. This implies you will be using a PIC pin anyway.

In this case, you could do this using a timer. Periodically scan the input (polled or IOC or timer interrupt handler). Reset the timer whenever a transition is detected on the input pin. If the timer expires then the interface is idle. Thus the timer flag can be used to determine if the signal is present.
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treitmey



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PostPosted: Fri Dec 12, 2008 12:46 pm     Reply with quote

I think a "one shot" could do it.
555 timer calculator
http://ourworld.compuserve.com/homepages/Bill_Bowden/555.htm
Ttelmah
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PostPosted: Fri Dec 12, 2008 3:50 pm     Reply with quote

Yes, or something like the NE567/SE567.
Gives a logic output, when a tone in it's detection band is seen.
Also, Sony, do some IR receivers, that contain the tone detection circuitry in the receiver IC.

Best Wishes
SherpaDoug



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PostPosted: Fri Dec 12, 2008 4:00 pm     Reply with quote

The LM555 one shot is really simple. Just set it to give a pulse 30uS long whenever it sees an input. If you trigger it at 38kHz (every 26uS) it will give a continuous output. If the input pulse train goes away the output goes away 30uS later.

Another way is a diode and a RC network. The diode charges the cap and the resistor discharges it in about 50uS. It works just like the 555 circuit but the output is not a clean logic level. I would use it with a PIC pin with that has a Schmitt input.
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crystal_lattice



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PostPosted: Sat Dec 13, 2008 9:30 am     Reply with quote

Hey guys, thanx for the ideas. The 555 one shot also crossed my mind but involves another chip and increases the cost, currently the design does not involve a pic, but if i have to buy lots of other chips to do the trick, it will probably be cheaper to replace all of them with a pic.

The RC solution was what i was really after as it has a small footprint and is low cost, The design already has a 555 timer and i haven't checked to see if a quad package is available so aditional 555 will thus take up more space/cost. The speed is not that critical as it will only have to sense traffic at very low speed and as such the 50us capacitor decay is more than sufficient.

I had a look at the TSOP34838, but it also requires a burst of 38KHz and as such will also require the same logic to produce a constant logic output. The NE567/SE567 looks good as this will also provide better protection against other light sources.

While i was trying to sleep.... i was thinking of some FET capacitor combo, pulse charges the cap which is tied to the gate of the fet with the average cap voltge sufficent to turn FET on thus providng a clean logic signal. a resistor will also discharge the cap in the event of no signal input.
SherpaDoug



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PostPosted: Sat Dec 13, 2008 10:18 am     Reply with quote

crystal_lattice wrote:

While i was trying to sleep.... i was thinking of some FET capacitor combo, pulse charges the cap which is tied to the gate of the fet with the average cap voltge sufficent to turn FET on thus providng a clean logic signal. a resistor will also discharge the cap in the event of no signal input.


I might turn this upside down. A resistor charges a cap to logic 1 when there are no pulses. Pulses on the gate of a FET discharge the cap periodically keeping the cap at a logic 0. R=10k C=5000pF T=50uS
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asmallri



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PostPosted: Sat Dec 13, 2008 10:29 am     Reply with quote

crystal_lattice wrote:
, The design already has a 555 timer and i haven't checked to see if a quad package is available so aditional 555 will thus take up more space/cost.


How about replacing the existing 555 with a PIC10F and have the PIC do both tasks.
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crystal_lattice



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PostPosted: Sun Dec 14, 2008 11:39 am     Reply with quote

SherpaDoug I think you take the prize.... I will just have to check that the cap will discharge below logic 1 if the duty cycle of the pulse at the gate is very low like 10%, what formula did u use to do your calculation/get your values? RxC?

Quote:

How about replacing the existing 555 with a PIC10F and have the PIC do both tasks.


If I incorporate a pic, I need to program it and for that effort i might just as well replace the whole circuit with a bigger pic, but with an increase in cost. I will experiment with the cap/FET idea and see how it works only then consider if upgrade is viable.

Thanks again for all the input...
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