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mojsa2000
Joined: 18 May 2010 Posts: 78
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PCM56p (DAC) problems |
Posted: Tue Jul 05, 2011 2:02 pm |
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Hi
Did anybody work with PCM56p? I tried to use it and I couldn't get a true voltage on its output. I use a PIC16f877a with a SPI communication too.(crystal: 4 MHz).
I don't know what I do. This is the program that send a value(0-0xFFFF).
Code: |
setup_spi(SPI_MASTER|SPI_L_TO_H|SPI_CLK_DIV_4);
void send_data(int8 low_byte,int8 hi_byte, char LE)
{
output_high(LE);
delay_us(5);
output_low(LE);
delay_us(5);
spi_write(hi_byte);
delay_us(3);
spi_write(low_byte);
delay_us(5);
output_high(LE);
delay_us(5);
output_low(LE);
delay_us(5);
}
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But it makes wrong. For example when I send 0x8000 it must supply -3 v on output but it supplies 1.5.
Can anybody help me?
best wishes |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19538
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Posted: Tue Jul 05, 2011 3:21 pm |
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Start with the SPI mode. Data needs to be clocked out on the falling edge of the clock, with the clock idling high. CKP=1, CKE=0. SPI mode 3.
Code: |
setup_spi(SPI_MASTER|SPI_H_TO_L | SPI_XMIT_L_TO_H | SPI_CLK_DIV_4);
//Then why fiddle around with two bytes, just send a 16bit value to the func
//Set the latch enable high during bootup, and then you only need to drop
//it to latch the data.
void send_data(int16 val_to_send, char LE) {
output_high(LE);
spi_write(make8(val_to_send,1)); //MSB
spi_write(make8(val_to_send,0)); //LSB
output_low(LE);
//Now you need to send another byte to trigger the latch transfer
spi_write(0);
output_high(LE); //Leave the latch line high
}
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The key point is that when you generate an SPI clock, with the latch 'low', the bytes already sent, are transferred to the output latch. It is the last 16bits clocked while the line is _high_, that are transferred to the output, when you generate a clock with the line low. The extra seven bits are just thrown away, when you start a new transfer.
Best Wishes |
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mojsa2000
Joined: 18 May 2010 Posts: 78
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Posted: Wed Jul 06, 2011 3:05 am |
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Dear Ttelmah
thanks for your attention but I did what you siad and it didnt work.(output always is 0 volt)
by PCM56 datasheet it is necessary to make a delay(at least a cycle)
when LE(latch enable) is low.
and when we send last byte as 0x0 actually we change in dac buffer Ithink.
did you work with PCM56 before?
please help me...
best regards |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19538
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Posted: Wed Jul 06, 2011 3:50 am |
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No, Have used a couple of other Burr Brown chips though, that appear to use the same interface.
On these, the key thing is that the 'LE' signal on it's own does nothing. You have to clock in the data (to the buffer, with LE high), drop LE, then generate another SPI clock. The bytes already sent, are transferred to the output latches, when an SPI clock is generated with LE low.
The delays on the chip I used, were all in terms of SPI clocks (there was no other clock present), which is how I did the code (drop LE, generate a sequence of SPI clocks, then raise it - the latching takes place on the first SPI clock edge _after_ LE drops). LE is held low for 8 clock times with the code as given should be enough delay.
If you think a further delay is needed, try adding it.
Best Wishes |
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mojsa2000
Joined: 18 May 2010 Posts: 78
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Posted: Wed Jul 06, 2011 5:28 am |
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Hi again
Help please...I can't get a valuable response from PCM56p. I tested any condition. I also checked all pins and wirings. I used the schematic that is mentioned in datasheet. (NOTE: I've connected ANALOG GND to DIGITAL GND) I did what Ttelmah said in previous posts. IT DIDN'T WORK....
I cant recognize the faults. Please help me... |
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mojsa2000
Joined: 18 May 2010 Posts: 78
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SOLVED!!! |
Posted: Fri Jul 08, 2011 1:58 am |
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Hi again
I tried on many ways but all of them were wasteful.
when I changed a command in device setup it worked.
the false command :
Code: | setup_spi(SPI_MASTER|SPI_H_TO_L|SPI_XMIT_L_TO_H|SPI_CLK_DIV_4); |
and the true command that replaced:
Code: | setup_spi(SPI_MASTER|0x4000|SPI_CLK_DIV_4); |
and thanks again Ttelmah
best regards |
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