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Using Configurable Logic Cell?

 
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Jerry I



Joined: 14 Sep 2003
Posts: 96
Location: Toronto, Ontario, Canada

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Using Configurable Logic Cell?
PostPosted: Fri Sep 13, 2013 8:40 pm     Reply with quote

Hi
Thanks in advance for any help.

I am wanting to use the PIC16F1509 which has Configurable Logic Cells.

I am trying to implement the Quadrature Decoder example from
Configurable Logic Cell Tips ’n Tricks TIP 7

With the help of CLC designer tool below.
http://ww1.microchip.com/...Tool_Ver%203-0-0-2.zip

Below shows the generated C file from the designer tool for TIP 7
Code:

// File: CLC.c
// Generated by CLC Designer, Version: 3.0.0.2
// Date: 07/08/2013 9:41 PM
// Device:PIC16(L)F1508/9

   CLC1GLS0  = 0x00;
   CLC1GLS1  = 0x00;
   CLC1GLS2  = 0x00;
   CLC1GLS3  = 0x00;
   CLC1SEL0  = 0x00;
   CLC1SEL1  = 0x50;
   CLC1POL   = 0x00;
   CLC1CON   = 0xC4;
   
   CLC2GLS0  = 0x00;
   CLC2GLS1  = 0x00;
   CLC2GLS2  = 0x00;
   CLC2GLS3  = 0x00;
   CLC2SEL0  = 0x00;
   CLC2SEL1  = 0x50;
   CLC2POL   = 0x00;
   CLC2CON   = 0xC4;

Configurable Logic Cell Tips ’n Tricks
http://ww1.microchip.com/downloads/en/DeviceDoc/41631B.pdf

TIP 7: QUADRATURE DECODER Page 14

Figure 17, 18, 19 show the example that I am trying to achive.
Figure 20, 21 show the CONFIGURATIONS FOR ROTARY ENCODER SIGNALS

I do understand the inputs in the example shown, what I dont understand how to configure the output signal to go to the required input signal of the chip.

Microchip AN696
http://ww1.microchip.com/downloads/en/AppNotes/00696a.pdf

Page 2 schematic Figure 1 shows, I am presuming is what tip 7 of CLC
Tips & Trick example is based on. The schematic shows that the 2 outputs of the D-Flops are going to the Pic's T0CKI and T1CKI.

How do I do that in the Tips & Tricks example 7 to assign where the D-Flop outputs go.

Does anyone have any experience with using the Configurable Logic Cells

Thanks again for any help.

Jerry
Ttelmah



Joined: 11 Mar 2010
Posts: 19553

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PostPosted: Sat Sep 14, 2013 3:47 am     Reply with quote

AN696, does not use the CLC at all. It just uses the CTC's, for which the inputs are T0CKI, and T1CKI. Some confusion here.....

You can setup the CLC registers, so they will accept the values directly from the generator program, with lines like:

#byte CLC1GLS0=getenv("SFR:CLC1GLS0");

Which will then allow the line:

CLC1GLS0 = 0x00;

to work correctly. Repeat for all the registers.

You can move the CLC outputs in some cases to alternative pins, with:

#PIN SELECT

It can only put some of the CLC signals onto a couple of pins.

I think though the key is that you are misunderstanding AN696. This has nothing to do with the CLC's. The chips it is for, don't have CLC's....
If you want to send a CLC output to T1CKI, you have to use a bit of wire.

Best Wishes
Jerry I



Joined: 14 Sep 2003
Posts: 96
Location: Toronto, Ontario, Canada

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PostPosted: Sat Sep 14, 2013 4:46 am     Reply with quote

Hi Ttelmah

Thanks for your answer.

I do understand AN696 uses the T0CKI & T1CKI inputs from the D_Flops and counts the pulses. I was just commenting that it appeared that they were using the CLC instead of external hardware in the same way.

What I don't understand is where is the data output of the CLC available. does it go to a pin on the chip. Tip 7 shows the output of the D-Flop but then what happens to the signal from the encoders.

Do I have access to that data?. Eg. EncA = PIN??

I would like to do what AN696 does. Take the outputs and feed the T0CKI & T1CKI.. If it takes a wire to externally connect it, I am fine with that.

What I want to know where is the output pins. Or how do I define the output Pin.

Thanks again.
dyeatman



Joined: 06 Sep 2003
Posts: 1935
Location: Norman, OK

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CLC Configuration
PostPosted: Sat Sep 14, 2013 6:26 am     Reply with quote

For Output pins first be aware the outputs are CLC1, CLC2 etc.

To select the CLC output pin you have to change the bits in the APFCON Port
Register for the selected port. See Tables 11-2 and 11-3 for Port A,
Table 11-5 and 11-6 for Port B, Table 11-8 for Port C etc...

In the priority table you can see which peripheral has precedence.

For Enabling Interrupts from the CLC see PIE3 Register 7-4 (page 81).
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Last edited by dyeatman on Sat Sep 14, 2013 6:50 am; edited 2 times in total
Ttelmah



Joined: 11 Mar 2010
Posts: 19553

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PostPosted: Sat Sep 14, 2013 6:42 am     Reply with quote

CLC1 can be routed to T0CKI, but none can be routed to T1CKI.

Table 1 in the data sheet is the key.

On the latest compiler, #pin select can set the AFPCON bits for you (but honestly I have to say doing it manually is safer.....).

Best Wishes
Jerry I



Joined: 14 Sep 2003
Posts: 96
Location: Toronto, Ontario, Canada

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PostPosted: Tue Jan 27, 2015 2:25 pm     Reply with quote

I have been busy with other work and now I just got some time to work with the CLC devices again.

I have had some success on configuring the CLC. But it is still unclear to me how I redirect the CLC1 output to T0CKI input.

Because that CLC1 output and T0CKI input is the same pin RA2, do I configure the RA2 Tris bit as output or input. Does it automatically feed the input of the T0CKI ??.

For CLC2 the output is RC0. I want to connect it to T1CKI input RA5, here I will add an external wire.

Thanks for any help.
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