| View previous topic :: View next topic |
| Author |
Message |
hamid9543
Joined: 31 Jan 2013
Posts: 63
|
| Input Change Notification[Solved] |
 Posted: Fri Feb 21, 2020 3:14 am |
 |
|
Hi
MCU: DSPIC33EP
I want to setup "Input Change Notification" only on RD5(RD5 is I/O).
is it possible ? Does Dspic33ep respond to signal on every I/O pin when it enables "Input Change Notification" ?
| Code: |
#include <Input Change Notification.h>
#INT_CNI
void cni_isr(void)
{
output_high(pin_b1);// only when Rd5 is high!
}
void main()
{
set_pullup(TRUE,PIN_D5);
enable_interrupts(INT_CNI);
enable_interrupts(INTR_GLOBAL);
while(TRUE)
{
//TODO: User Code
}
}
|
Last edited by hamid9543 on Sat Feb 22, 2020 1:46 am; edited 1 time in total |
|
 |
Ttelmah
Joined: 11 Mar 2010
Posts: 19540
|
|
| Posted: Fri Feb 21, 2020 3:37 am |
|
|
Would help if you told us the actual chip... 
Generally the interrupt triggers when any pin that has it's CNEN bit set in
the corresponding register changes. Not all pins support change notification.
So without the chip name we can't tell you whether RD5 does, or what
bit you have to set (probably bit 5 of CNEND).
So assuming it is supported:
| Code: |
#word CNEND=getenv("SFR:CNEND")
//then in the code
bit_set(CNEND,5); //to enable change notification on this pin
//Then enable the interrupt
|
|
|
|
hamid9543
Joined: 31 Jan 2013
Posts: 63
|
|
| Posted: Fri Feb 21, 2020 4:43 am |
|
|
| Ttelmah wrote: | Would help if you told us the actual chip...
Generally the interrupt triggers when any pin that has it's CNEN bit set in
the corresponding register changes. Not all pins support change notification.
So without the chip name we can't tell you whether RD5 does, or what
bit you have to set (probably bit 5 of CNEND).
So assuming it is supported:
| Code: |
#word CNEND=getenv("SFR:CNEND")
//then in the code
bit_set(CNEND,5); //to enable change notification on this pin
//Then enable the interrupt
|
|
Dspic33ep128gp506 actual chip name. Is this interrupt sensitive to the edge? how control sensitive edge?
| Code: |
#include <Input Change Notification.h>
#INT_CNI
void cni_isr(void)
{
output_high(pin_b1);// only when Rd5 is high!
}
#word CNEND=getenv("SFR:CNEND")
void main()
{
bit_set(CNEND,5);
enable_interrupts(INT_CNI);
enable_interrupts(INTR_GLOBAL);
while(TRUE)
{
//TODO: User Code
}
}
|
|
|
|
jeremiah
Joined: 20 Jul 2010
Posts: 1354
|
|
| Posted: Fri Feb 21, 2020 4:33 pm |
|
|
I would recommend using the builtin constants for enabling IOC/CNI pins:
| Code: |
#include <33ep128gp506.h>
#INT_CNI
void cni_isr(void)
{
output_high(pin_b1);// only when Rd5 is high!
}
void main()
{
enable_interrupts(INTR_CN_PIN | PIN_D5);
//enable_interrupts(INTR_CN_PIN | PIN_D8); // just an example for multiple pins
enable_interrupts(INTR_GLOBAL);
while(TRUE)
{
//TODO: User Code
}
}
|
| hamid9543 wrote: |
Dspic33ep128gp506 actual chip name. Is this interrupt sensitive to the edge? how control sensitive edge?
|
CNI/IOC interrupts are generally edge triggered. Some chips let you select the edge or edges, but this chip does not. It triggers on both high to low and low to high transitions. You will have to come up with some logic in your ISR if you want only a certain type of edge |
|
|
Ttelmah
Joined: 11 Mar 2010
Posts: 19540
|
|
| Posted: Sat Feb 22, 2020 1:14 am |
|
|
Yes.
This is why the chip number is so important. The support 'varies' with some
chips having the constants and others not. This one does, so as Jeremiah
says, the easiest/best way is to use these.
Similarly, what can be done varies. In this case it behaves more like
the 'old' interrupt on change, triggering on both edges. Some other chips
allow you to specify the edge. Remember also you must read the pin in
the interrupt, or 'change' will remain set. |
|
|
jeremiah
Joined: 20 Jul 2010
Posts: 1354
|
|
| Posted: Sat Feb 22, 2020 6:14 am |
|
|
| Ttelmah wrote: | Remember also you must read the pin in
the interrupt, or 'change' will remain set. |
Keep in mind this isn't always true either. For example, on every PIC24, dspic30, and dspic33 that I have used, I have not had to read the pin to clear the interrupt. I think some of the 8 bit chips require it though. |
|
|
Ttelmah
Joined: 11 Mar 2010
Posts: 19540
|
|
| Posted: Sat Feb 22, 2020 9:37 am |
|
|
Yes.
On all the PIC16/18 chips the event is triggered by a mismatch between
a latch, and the pin value. The latch is loaded whenever the port is read.
Hence you must read the pin. On the DSPIC's, it instead is a 'flip flop' feeding
the interrupt bit that is set whenever it is clocked, The clock is the edges
from the pin itself.
However he is going to have to read the pin to establish which edge
has actually triggered, so it makes no difference.... |
|
|
|
FAQ 
Search
Register
Profile 
Log in to check your private messages 
Log in
