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jj9921
Joined: 13 Dec 2021
Posts: 3
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| Trouble controlling daisy chained AD5263s |
 Posted: Mon Dec 13, 2021 2:45 pm |
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I have been trying to control 2 daisy chained AD5263 digipots with a PIC16F1509. I have gotten the value of the first to work but the second is stuck. Here is the code that I currently have.
| Code: | #include <16f1509.h>
#fuses HS, NOWDT, NOLVP, PROTECT
#device ICD=TRUE
#device ADC=10
#use delay(clock=16000000, int)
#use rs232(UART1, baud=31250,parity=N,stop=1,bits=8, ERRORS)
#use spi(MASTER, SPI1, FORCE_SW, IDLE=0, SAMPLE_RISE, ENABLE=PIN_C6, BITS=20, STREAM=STREAM1, BAUD=400000)
while(1){
spi_xfer(STREAM1, (0b01111111110100000000), 20);
}
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The second 10 bits in the number control the first pot's values fine but there is no change to the value on the second when I change the first set of 10 bits. Is there a setting that I am missing or do I need a separate line to send data to each of the pots? |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Mon Dec 13, 2021 7:00 pm |
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The AD5263 data sheet says on pg 7:
| Quote: |
SDO/O1 -
Serial Data Output in SPI Mode. Open-drain transistor requires pull-up resistor. |
Do you have a pull-up resistor on the SDO pin of the 1st AD5263 ?
Its needed because SDO is an open drain output.
On page 19 of the AD5263 data sheet, in Figure 47, it recommends
a 2.2K pullup on SDO. |
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jj9921
Joined: 13 Dec 2021
Posts: 3
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| Posted: Mon Dec 13, 2021 7:09 pm |
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| Yeah it has that so it should just be a code issue. |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Mon Dec 13, 2021 10:36 pm |
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What is your CCS compiler version ? It's a 4-digit number at the
top of your .LST file, such as 5.105. |
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jj9921
Joined: 13 Dec 2021
Posts: 3
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| Posted: Mon Dec 13, 2021 11:20 pm |
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| Its V4.140 |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Tue Dec 14, 2021 12:23 am |
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The code between 4.140 and 5.105 matched in all the important areas.
Can you post a schematic of your project ?
You have to upload it to a free web hosting site like imgur.com
and them post a link to it here. |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19539
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| Posted: Tue Dec 14, 2021 4:19 am |
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Key thing:
You cannot do this. The _hardware_ SPI only clocks in multiples of 8bits.
The ADS5263, does have in an application note for use with devices that
do this the note, that it is the _last_ ten bits that are used by the device.
This is also noted in the data sheet:
| Quote: |
Note that only the last 10 bits that are clocked into the register are latched into the decoder.
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You need to change this to clock 24bits. Send your 20 bits as the last 20
bits of the 24bit transfer. Since SPI sends MSb first, should be exactly the
same as your current data |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Tue Dec 14, 2021 8:23 am |
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| But he has FORCE_SW in his #use spi() statement. |
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temtronic
Joined: 01 Jul 2010
Posts: 9243
Location: Greensville,Ontario
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| Posted: Wed Dec 15, 2021 8:31 pm |
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OK, perhaps a silly question but...
Have you got BOTH digipots to work, independently ??
Any chance there's a wiring issue (spi out of #1 going to SPI out of #2 ??)?
Missing SPI#2 clock ?
You need to confirm the hardware works 100% THEN look at the code. |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19539
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| Posted: Wed Dec 15, 2021 11:48 pm |
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| PCM programmer wrote: | | But he has FORCE_SW in his #use spi() statement. |
Yes, but he is not specifying SPI pins, instead saying SPI1. I don't know
if the old compiler would handle this correctly. Suspect it might force
hardware (using SPIx is always equivalent to FORCE_HW).
I didn't keep and V5 compilers this early, so can't test.
Honestly better to use 24bits which then avoids the issue. |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Thu Dec 16, 2021 2:34 am |
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I installed vs. 4.140 and looked at the ASM code. It uses the SPI1
pins to do software SPI. I said above:
| Quote: | | The code between 4.140 and 5.105 matched in all the important areas. |
I think he has a hardware problem. Possibly something simple such
as incorrect connections from the first AD5263 to the 2nd one. |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19539
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| Posted: Thu Dec 16, 2021 2:48 am |
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OK. Fair enough. I must admit I tend to not trust older versions to handle
such a complex 'translation' of the user's desires!... |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19539
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| Posted: Thu Dec 16, 2021 4:15 am |
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Look at what he sends:
0b01111111110100000000
This has both the ADC's on the same address... 01
Wrong. 
There is another problem. Multi byte transfers on SPI, are sent MSB first,
but the bytes are sent LSb first (which is what the chip wants).
He would actually have to re-order the bytes to get the data to send
in the correct order.... |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Thu Dec 16, 2021 8:04 am |
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The AD5263 is a quad digital pot. The first two bits of each 10-bit
group select which of the four pots to use in each chip. So his code
is OK.
The AD5263 wants the D7 bit clocked in first after the two address bits.
The CCS software SPI library code sends it that way. I don't see a problem.
https://www.analog.com/media/en/technical-documentation/data-sheets/AD5263.pdf
The OP appears to have lost interest. He hasn't responded in a
couple of days. |
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