emulator quadrature encoder

[volcane]

Hi,

you can generate two square waves with a PIC 1000 Hz out of phase with each other in advance or delay of 90 degrees?

[Ttelmah]

Yes.

How easy it is, depends on the PIC.
Simplest way, use a PIC that supports two different timers for PWM.
Program the timers to give the required 1000Hz rate.
Program the two PWM's, onto the two separate timers.

Then set one timer to 0, wait for 250uSec, set the other timer to zero.

Two PWM's, one 250uSec behind the other.

Best Wishes

[volcane]

[Ttelmah]

Hasn't got two PWM's.
You could do it in software, just by reading a timer, or using the CCP, and programming it for the points needed, but relatively 'more work'.
However could certainly be done.

Probably easiest way would be to program the time for the first edge into the CCP. Set this up so it doesn't clear the timer on compare match, output the first pattern, and just wait for the interrupt flag to set. Output the second bit pattern, then clear the flag, set the second time. Then the third patten etc.. When you put in the fourth period, also change the CCP programming to 'clear on match', and go back to the start. Total timing would be accurate limited only by the clock rate, while the intermediate changes will jitter by a couple of processor cycles only.

Best Wishes

[asmboy]

The above answer is a killer good solution to a single frequency problem.
No disagreement.

However, with just a little bit of external hardware ( 1- 1/2 74HC74 D flip flops ), you can use a 4X output freq , "duty cycle insensitive" clock, that is EDGE driven to generate perfect 50% duty cycle SQR waves of 0,180,90 and 270 degrees ie: the full suite of I&Q clocks.

This is more commonly done as part of a PLL circuit - but there is no reason it wont work with a PIC PWM output either.

This alternate method works over a huge range of frequencies.
- the advantage of this hardware boosted approach is near zero ratio error , absolute LOCKED phase integrity between all the signals, and vanishingly LOW jitter , even at pretty high frequencies and no need for symmetry in the master clock. And of course - just a SINGLE PWM output is needed if using a PIC as the source. the ONLY drawback is requiring a clock that is 4X greater than what you need from the I&Q clocks.

Not to dismiss the approach to the 1khz problem posed above, as i am sure it will work consistently - But I think there may be some absolute uncertainty of phase relationships when using Ttelmah's method based on the code execution of setting the PWM circuit , especially at higher frequencies, since the delay you need to control, including the command CPU cycles to DO the job, will vary with the frequency.

In your PIC- if you have as master clock that can be divided to create a very good 250usecs - you are gonna be fine- but you do not say how phase accurate an I&Q output you require, or a jitter spec either.

just my 2 cents

[John P]

Maybe I'm missing something here. But it's seeming to me that people are giving complicated answers to a simple question.

The requirement is 2 square waves 90 degrees out of phase at 1KHz. So there are 4 transitions in a 1msec period. So set up a 4KHz interrupt, which just about any PIC can do; at each occurrence, one of the outputs changes state.

If it's necessary to keep the outputs absolutely symmetrical, load the port from a dummy variable as the first action taken within the interrupt, and load up the next value of the variable before returning from the interrupt. So: