ADC and built in Vref and Input Levels at AN0

[soonc]

I'm looking at the PIC18(L)F67K22 and am confused about how to use the ADC, Vref. and Analog Input levels.

Assuming the chip will not use the internal Regulator and be powered from a Lithium battery at approx. 3.2V so the Vdd will be the same as Vbat.

I need to monitor the Vdd and expect to use the built in Vref. to ensure I can actually get a real reading of it's level.

As Vdd is the Lithium Battery potential I assume I should use the Vref at 2.048V because the 4.096Vref is not possible (or is it ?) with only 3.2V for VDD.

If I apply the Vdd directly to Pin AN0 to measure Vdd the level will be above the Vref. level so what happens to the conversion ?

Should I put a potential divider on the input of AN0 to ensure the Maximum voltage does not exceed the Vref. 2.048V with a fresh Lithium cell ?

I looked at the data sheet but the subject does not seem to be clear to me some help would be very welcome.

Thanks

[Ttelmah]

Your best bet is to use the 'reverse' approach.
One ADC option is to directly read the internal 1.024 reference as an input to the ADC. Run the ADC Vref off the supply, read the voltage from the Vref input. Then if (for instance) it reads 1271, the actual supply voltage is (1.024/1271)*4096= 3.31v. Use this value then for any supply voltage testing, and as the voltage for any other readings made with the ADC.

Big advantage, no potential divider (yes, you would need one, and it's impedance would have to be low enough for use as an ADC input - result significant current - 2.5KR minimum impedance....). Also your ADC then has a large enough voltage range (it requires 3v _minimum_ to work properly/accurately...). The 2.048 Vref options, basically is pointless, and 'yes' you need more supply voltage to use the 4.096v option...

An analog input can never go more than one diode drop 'above' the Vref voltage. If it does, it first draws the Vref upwards, and then risks damage.

[soonc]

Thank you Ttelmah,
Works great.