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rolox
Joined: 25 Dec 2014 Posts: 33
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how to place larger arrays linear in RAM |
Posted: Sun Mar 13, 2016 3:55 pm |
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Hi,
i have several arrays of structs in my prog (PIC18) like this f.e.
Code: |
typedef struct
{
int8 Field0;
int8 Field1;
int8 Field2;
int8 Field3;
int16 Field4;
} my_struct;
my_struct Counters[4];
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for some reason i need these vars/arrays being linear in RAM, i mean not interrupted by some processor registers. I remember that prev Versions did so to optimize RAM usage - maybe the latest (using 5.056) does not.
I can check in the symbol file after each compile, but maybe there is some #use statement to ensure this?
best regards
Roland |
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PCM programmer
Joined: 06 Sep 2003 Posts: 21708
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Ttelmah
Joined: 11 Mar 2010 Posts: 19559
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Posted: Mon Mar 14, 2016 4:21 am |
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Though really, on a PIC18, you should not have to worry.
Splitting basically only takes place on PIC16's, where the memory is segmented. On these you have banks, each of which has processor registers, then user RAM. So an array may (sometimes may _have_) to be split. 'Have', because on most chips the blocks of user RAM in a bank are small like 96 bytes.
On a PIC 18, the configuration is fundamentally different, with all the processor registers up at the top of memory, and the RAM below being a single addressable 'lump'.
Generally (unless memory is running very low), CCS will put any normal array on a PIC18 or later as a continuous lump. |
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rolox
Joined: 25 Dec 2014 Posts: 33
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Posted: Mon Mar 14, 2016 11:54 am |
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thx to both.
In fact i started the project with a 16F1788 and had this issue with "segmentation" before , meanwhile switched to a 18F26K20 ...
greetings
roland |
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