 |
 |
| View previous topic :: View next topic |
| Author |
Message |
Alexis
Joined: 10 Nov 2016
Posts: 2
|
| [SOLVED] Code protection by blocks pic18f25k50 |
 Posted: Thu Nov 10, 2016 2:35 am |
 |
|
Hello, I have an issue, I don't know how to set a certain block of code "read protected", you can read in the datasheet DS30000684B-page 385:
| Quote: | The user program memory is divided into three or five
blocks, depending on the device. One of these is a
Boot Block of 0.5K or 2K bytes, depending on the
device. The remainder of the memory is divided into
individual blocks on binary boundaries.
Each of the blocks has three code protection bits
associated with them. They are:
• Code-Protect bit (CPn)
• Write-Protect bit (WRTn)
• External Block Table Read bit (EBTRn) |
the mentioned bits (CPB, CP0, CP1, CP2, CP3, WRTB, WRT1, WRT2, WRT3, EBTRB, EBTR1, EBTR2, EBTR3), are part of "configuration words" from CONFIG5 to CONFIG7, but I don't know how to set/clear a bit from a configuration word, the only way that I know is with #fuses but there is no fuses to protect a certain block of code, for example, to code protection the fuse is PROTECT and NOPROTECT, for boot block are CPB and NOCPB, I don't see the fuses CP1, CP2 or CP3, here is le this that appears in the header file <18F25K50.h>
| Code: | //////// Fuses: PLL4X,PLL3X,NOPLLEN,PLLEN,NOCPUDIV,CPUDIV2,CPUDIV3,CPUDIV6
//////// Fuses: LS24MHZ,LS48MHZ,LP,XT,HSH,HSM,ECH,ECH_IO,RC,RC_IO,INTRC_IO
//////// Fuses: INTRC,ECM,ECM_IO,ECL,ECL_IO,PRIMARY_SW,PRIMARY,NOFCMEN,FCMEN
//////// Fuses: NOIESO,IESO,PUT,NOPUT,NOBROWNOUT,BROWNOUT_SW,BROWNOUT_NOSL
//////// Fuses: BROWNOUT,BORV28,BORV25,BORV22,BORV19,LPBOR,NOLPBOR,NOWDT
//////// Fuses: WDT_NOSL,WDT_SW,WDT,WDT1,WDT2,WDT4,WDT8,WDT16,WDT32,WDT64
//////// Fuses: WDT128,WDT256,WDT512,WDT1024,WDT2048,WDT4096,WDT8192
//////// Fuses: WDT16384,WDT32768,CCP2B3,CCP2C1,NOPBADEN,PBADEN,T3CKB5
//////// Fuses: T3CKC0,SDOC7,SDOB3,MCLR,NOMCLR,NOSTVREN,STVREN,NOLVP,LVP
//////// Fuses: NOXINST,XINST,DEBUG,NODEBUG,PROTECT,NOPROTECT,CPB,NOCPB,CPD
//////// Fuses: NOCPD,WRT,NOWRT,WRTC,NOWRTC,WRTB,NOWRTB,WRTD,NOWRTD,EBTR
//////// Fuses: NOEBTR,EBTRB,NOEBTRB |
MCU: PIC18F25K50
COMPILER VERSION: 5.015
Greetings and thanks for your help.
Last edited by Alexis on Thu Nov 10, 2016 1:55 pm; edited 1 time in total |
|
 |
Ttelmah
Joined: 11 Mar 2010
Posts: 19553
|
|
| Posted: Thu Nov 10, 2016 3:24 am |
|
|
This does get complex....
Why?. If you just use NOEBTR, and NOEBTRB, then the whole chip is protected from external block reads. The standard CCS settings, allow you to set the master protect bits, but doesn't set the 'blocking' bits (except for the boot block versus main code).
The only reason for 'blocking', is if you need one block to actually be readable, while the rest of the code is protected (perhaps a data table updated by the processor, that then wants to be read and saved before the chip is updated).
If you do want to do this, the this is where #fuses n=x comes in.
As well as all the 'named' fuses, you can set the fuses directly.
#fuses 5=0x0000
will clear all the bits in CONFIG5, turning on all the CP bits
So what you can do, is set the oscillator etc., using the standard fuses, and then set the other things directly.
So for instance:
| Code: |
#include <18F25K50.h>
#device ADC=10
#use delay(crystal=20000000)
void main()
{
while(TRUE)
{
//Nothing....
}
}
//Gives
/*Configuration Fuses:
Word 1: E201 PLL3X NOPLLEN NOCPUDIV LS24MHZ HSH PRIMARY FCMEN IESO
Word 2: 3C5E PUT BROWNOUT BORV19 NOLPBOR NOWDT WDT32768
Word 3: D300 CCP2C1 PBADEN T3CKC0 SDOB3 MCLR
Word 4: 0081 STVREN NOLVP NOXINST NODEBUG
Word 5: C00F NOPROTECT NOCPB NOCPD
Word 6: E00F NOWRT NOWRTC NOWRTB NOWRTD
Word 7: 400F NOEBTR NOEBTRB*/
//However add
#fuses 5=0x0000
//and it gives
/*Configuration Fuses:
Word 1: E201 PLL3X NOPLLEN NOCPUDIV LS24MHZ HSH PRIMARY FCMEN IESO
Word 2: 3C5E PUT BROWNOUT BORV19 NOLPBOR NOWDT WDT32768
Word 3: D300 CCP2C1 PBADEN T3CKC0 SDOB3 MCLR
Word 4: 0081 STVREN NOLVP NOXINST NODEBUG
Word 5: 0000 PROTECT CPB CPD
Word 6: E00F NOWRT NOWRTC NOWRTB NOWRTD
Word 7: 400F NOEBTR NOEBTRB
*/
|
Note how word 5 is set to the 16bit value specified.  |
|
|
Alexis
Joined: 10 Nov 2016
Posts: 2
|
|
| Posted: Thu Nov 10, 2016 1:55 pm |
|
|
Thankyou very much Ttelmah, the #fuses n=0xnnnn worked for me very well, something new that I've learned  this is my actual template to work:
| Code: |
//MICROCONTROLLER TO USE
#include <18F25K50.h>
//FUSES datasheet 371
#FUSES LS48MHZ, NOCPUDIV, PLLEN, PLL3X //CONFIG1L 0x23 00100011
#FUSES NOIESO, NOFCMEN, PRIMARY_SW, HSH //CONFIG1H 0x23 00100011
#FUSES LPBOR, BORV28, BROWNOUT_SW, PUT //CONFIG2L 0x02 00000010
#FUSES WDT256, WDT_SW //CONFIG2H 0x22 00100010
#FUSES NOMCLR, SDOB3, T3CKC0, PBADEN, CCP2C1 //CONFIG3H 0xD3 11010011
//DISABLE PIC18 extended instruction set
#FUSES NODEBUG, NOXINST, LVP, STVREN //CONFIG4L 0x85 10000101
#FUSES 5=0xC00E //CONFIG5L 0x0E 00001110
//#FUSES NOCPD, NOCPB //CONFIG5H 0xC0 11000000
#FUSES 6=0x800E //CONFIG6L 0x0E 00001110
//#FUSES NOWRTD, WRTB, WRTC //CONFIG6H 0x80 10000000
#FUSES 7=0x400E //CONFIG7L 0x0E 00001110
//#FUSES NOEBTRB //CONFIG7H 0x40 01000000
//set the clock to run at 48 MHz from an 16 MHz external oscillator using the PLL
#use delay(clock=48MHz, crystal=16MHz)
//SERIAL PORT SETUP
//#use rs232(baud=9600,xmit=pin_c6,rcv=pin_c7,parity=N,bits=8)
// Bootloader
#define CODE_START 0x2000
#build(reset=CODE_START, interrupt=CODE_START+0x08)
#org 0, CODE_START-1 {}
#BUILD(Bootload) // test, en duda el usar esta linea
//---------------PROGRAMA----------------
void main (void)
{
}
/*
org 0x0000 ; CPU reset vector
goto powerup ; Start app or bootloader
org 0x0004 ; Bootloader launch vector
goto powerupBootloader ; Start bootloader
org 0x0008 ; CPU high-priority interrupt vector
goto 0x2008 ; Jump to the application's ISR
org 0x0018 ; CPU low-priority interrupt vector
goto 0x2018 ; Jump to the application's ISR
*/
|
the purpose to block from 0x000 to 0x1FFF is because there is a bootloader at that part of the memory, so it need to be corruption-proof.
I have another question, when I set the fuse MCLR, the compiler CLEARs the bit 7 of config3, the datasheet says:
| Quote: | MCLRE: MCLR Pin Enable bit
1 = MCLR pin enabled; RE3 input pin disabled
0 = RE3 input pin enabled; MCLR disabled |
so, is there a bug with the compiler? |
|
|
Ttelmah
Joined: 11 Mar 2010
Posts: 19553
|
|
| Posted: Thu Nov 10, 2016 3:11 pm |
|
|
| I'm afraid that is your compiler version. 5.015, was a very early 'working' V5 compiler, and still had quite a few bugs. Current compilers set the bit when you ask for MCLR. |
|
|
ELCouz
Joined: 18 Jul 2007
Posts: 427
Location: Montreal,Quebec
|
|
| Posted: Thu Nov 10, 2016 3:27 pm |
|
|
| Ttelmah wrote: | | I'm afraid that is your compiler version. 5.015, was a very early 'working' V5 compiler, and still had quite a few bugs. Current compilers set the bit when you ask for MCLR. |
^^^^ This.... 5.015 is VERY old when we are talking about CCS C Compiler.
We are talking win95 (5.015) vs win7 (5.064) big difference in terms of bugs
Take a look here and see what's changed since what 2 years?
http://www.ccsinfo.com/devices.php?page=versioninfo
_________________
Regards,
Laurent
-----------
Here's my first visual theme for the CCS C Compiler. Enjoy! |
|
|
|
|
You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot vote in polls in this forum
|
Powered by phpBB © 2001, 2005 phpBB Group
|
FAQ 
Search
Register
Profile 
Log in to check your private messages 
Log in
