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Ttelmah
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 Posted: Wed Jul 28, 2004 10:56 am |
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| Mark wrote: | | Quote: |
For instance, on the 18Fxx2, when dealing with the UART, the TRIS settings, have to differ between operating on the MicroChip ICE, and the real chips. The ICE follows the data sheet, while the real chip reverses the TRIS settings for these bits...
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Could you explain this a bit more. Are you talking about RC6 and RC7? I use the 252's and 452's with and ICE2000 and ICD2 and don't remember having to do anything different. |
Using the PCM18XC1 pod on the ICE2000, I found that the lines appeared to work, however the TRIS bits were set (differs from how it should behave), but depending on which direction the SPI clock edges were set, in one direction, the leading edge was lost with the 'correct' settings. It just happened that the chip I was talking to, needed the configuration that failed...
Best Wishes |
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Neutone
Joined: 08 Sep 2003
Posts: 839
Location: Houston
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| Posted: Wed Jul 28, 2004 11:40 am |
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| Macro wrote: | | Neutone wrote: | Put this is the slave
| Code: |
While(1)
{ x = spi_read(0xAA);
}
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Using that code on the slave and changing TRISC to 0x7F I was able to get the value of 'x' to be the value the master sent over. Unfortunately, the slave is still not outputting anything (constant 5V). |
What are you doing with the SS pin? Also search for this text in the data sheet 'disabling the SDO output.' |
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Macro
Joined: 10 Jun 2004
Posts: 9
Location: Huntsville, Al
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| Posted: Wed Jul 28, 2004 12:47 pm |
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| Neutone wrote: |
What are you doing with the SS pin? Also search for this text in the data sheet 'disabling the SDO output.' |
I did see the note you are talking about.
| Quote: |
the SPI is in Slave mode with SS
pin control enabled (SSPCON<3:0> =
0100), the state of the SS pin can affect
the state read back from the TRISC<5>
bit. The Peripheral OE signal from the
SSP module into PORTC controls the
state that is read back from the
TRISC<5> bit (see Section 10.3
�PORTC, TRISC and LATC Registers�
for information on PORTC). If Read-
Modify-Write instructions, such as BSF,
are performed on the TRISC register
while the SS pin is high, this will cause the
TRISC<5> bit to be set, thus disabling the
SDO output. |
I have SS disabled so that note doesn't apply. Just to be sure I checked and the value of SSPCON1 (0x25), which is correct.
I also tried to make the 18F2431 the master and I still could not see any pulses on SDO even thought I could see a clock pulse coming out.
_________________
David Adams |
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Neutone
Joined: 08 Sep 2003
Posts: 839
Location: Houston
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| Posted: Wed Jul 28, 2004 2:42 pm |
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| If you write a simple program to turn that pin on and off and that does not work the pin is probably dead. That is assuming that the pin is not being driven from somewhere else. |
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