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prayami
Joined: 22 Dec 2004
Posts: 78
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| SPI in 18F4525 |
 Posted: Mon Aug 08, 2005 11:29 pm |
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Hi..I am using 18F4525 and PCH 3.212 compiler.
I am new to SPI. I have used I2C in one program using the same
compiler.
I am trying to run the following simple program. When I load the program
on 18F4525 and check the PIN_C3 i.e SCK then it is low. Means it does
not generate any clock.
Is there any bug in this version for this processor?
| Quote: |
#include <18F4525.h>
#fuses H4,NOWDT,NOPROTECT,NOLVP,BROWNOUT,PUT,NOPBADEN,NOXINST,NOMCLR
#define KNOCK_DI PIN_C5 //SDO
#define KNOCK_DO PIN_C4 //SDI
#define KNOCK_CLK PIN_C3 //SCK
void main() {
set_tris_c(0x00); //I tried to comment this out
setup_spi(SPI_MASTER | SPI_L_TO_H | SPI_CLK_DIV_4);
delay_ms(10);
do {
spi_write(0x48);
delay_ms(1);
} while (TRUE);
}
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dima2882
Joined: 13 Jul 2005
Posts: 25
Location: Maryland
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| Posted: Tue Aug 09, 2005 10:31 am |
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| In your set_tris_c() command, you set everything as an output. Set the SDO line as output, and the SDI and SCK as an input. See examples in the code library section of the forum. |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Tue Aug 09, 2005 12:44 pm |
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I don't have your version of the PCH compiler. I do have vs. 3.230.
Can you compile the following code and post the .LST file starting at
main() and going down to the end of the file ? If you do that, I can
compare your ASM code to the latest version and see if there's a problem.
| Code: | #include <18F4525.h>
#fuses H4,NOWDT,NOPROTECT,NOLVP,BROWNOUT,PUT,NOPBADEN,NOXINST,NOMCLR
#use delay(clock=40000000) // 40 MHz
//===========================
void main()
{
setup_spi(SPI_MASTER | SPI_L_TO_H | SPI_CLK_DIV_4);
while(1)
{
spi_write(0x48);
}
} |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Tue Aug 09, 2005 1:11 pm |
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| Quote: | In your set_tris_c() command, you set everything as an output.
Set the SDO line as output, and the SDI and SCK as an input.
See examples in the code library section of the forum. |
Actually, that applies only to SPI slave mode. In master mode, which
he is using, SCK should be set as an output.
From the 18F4525 data sheet:
| Quote: |
� SDI is automatically controlled by the SPI module
� SDO must have TRISC<5> bit cleared
� SCK (Master mode) must have TRISC<3> bit cleared
� SCK (Slave mode) must have TRISC<3> bit set
� SS must have TRISA<5> bit set |
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dima2882
Joined: 13 Jul 2005
Posts: 25
Location: Maryland
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| Posted: Tue Aug 09, 2005 1:29 pm |
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| Quote: | In master mode, which
he is using, SCK should be set as an output.
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Ooops, I miswrote. Since the master generates the clock, the master side must have the clock as an output. Sorry about that... |
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prayami
Joined: 22 Dec 2004
Posts: 78
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| Posted: Tue Aug 09, 2005 3:46 pm |
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Hi..PCM..Thanks for helping....
Here with I am sending .LST file generated from your given program.
Please have a look and let me know, what should I do?
| Quote: |
CCS PCH C Compiler, Version 3.212, 26381 10-Aug-05 09:41
Filename: TestSPI1.LST
ROM used: 54 bytes (0%)
Largest free fragment is 49098
RAM used: 5 (0%) at main() level
5 (0%) worst case
Stack: 0 locations
*
0000: GOTO 0004
.................... #include <18F4525.h>
.................... //////// Standard Header file for the PIC18F4525 device ////////////////
.................... #device PIC18F4525
.................... #list
....................
.................... #fuses H4,NOWDT,NOPROTECT,NOLVP,BROWNOUT,PUT,NOPBADEN,NOXINST,NOMCLR
.................... #use delay(clock=40000000) // 40 MHz
.................... //===========================
.................... void main()
.................... {
0004: CLRF FF8
0006: BCF FD0.7
0008: CLRF FEA
000A: CLRF FE9
000C: MOVF FC1,W
000E: ANDLW C0
0010: IORLW 0F
0012: MOVWF FC1
0014: MOVLW 07
0016: MOVWF FB4
.................... setup_spi(SPI_MASTER | SPI_L_TO_H | SPI_CLK_DIV_4);
0018: BCF FC6.5
001A: BCF F94.5
001C: BSF F94.4
001E: BCF F94.3
0020: MOVLW 20
0022: MOVWF FC6
0024: MOVLW 00
0026: MOVWF FC7
....................
.................... while(1)
.................... {
.................... spi_write(0x48);
0028: MOVF FC9,W
002A: MOVLW 48
002C: MOVWF FC9
002E: BTFSS FC7.0
0030: BRA 002E
.................... }
0032: BRA 0028
....................
.................... }
0034: SLEEP
Configuration Fuses:
Word 1: 8600 H4 IESO FCMEN
Word 2: 1E1E BROWNOUT NOWDT BORV21 PUT WDT32768
Word 3: 0510 NOPBADEN LPT1OSC NOMCLR
Word 4: 0081 STVREN NODEBUG NOLVP NOXINST
Word 5: C00F NOPROTECT NOCPD NOCPB
Word 6: E00F NOWRT NOWRTD NOWRTC NOWRTB
Word 7: 400F NOEBTR NOEBTRB
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Tue Aug 09, 2005 6:16 pm |
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The ASM code is nearly the same. The latest version of PCH adds
two lines to read the CMCON register and to clear the CMIF interrupt bit.
That's not the reason for your program failure.
The config bits are somewhat different with the latest version.
--------------
Before we go any farther, I have some questions:
1. Is this the first program you have ever tried to run on your 18F4525
board ?
2. Have you ever made a program run successfully on the 18F4525
using the #fuse settings that are shown in your test program ?
3. What is the Vdd voltage for your PIC ? 5v or 3.3v or something else ?
4. What is your crystal frequency ? |
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prayami
Joined: 22 Dec 2004
Posts: 78
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| Posted: Tue Aug 09, 2005 6:39 pm |
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Here are the answer pf your questions:
(1) + (2) I have worked on one project using 18F4525 and using the
#fuses those are in the test programs
(3) Vdd is 5V
(4) Crystal frequency is 10Mhz and I am using PLL so 40MHz clock
frequency.
I have one question: If I write the following line then is it mean that
it should generate clock signal on SCK PIN? Or it is also depend on
the peripheral IC that we are suing to communicate with? I eman if
there is problem in that interfacing then can it be stop clock generation?
Thanks..... |
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prayami
Joined: 22 Dec 2004
Posts: 78
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| Posted: Tue Aug 09, 2005 7:07 pm |
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It is working. I just changed the another 18F4525 and it is working.
I think there may be problem in that chip. Thanks..and sorry for
wasting your time. |
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