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Chicky
Joined: 04 Aug 2005
Posts: 21
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| PIC and Static RAM |
 Posted: Tue Jan 24, 2006 7:39 pm |
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Hello...
Anyone here have any experience using/programming pic with static RAM ic? I need a direction on where to start i.e. how to read/access data stored on the static RAM...
TQ!  |
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libor
Joined: 14 Dec 2004
Posts: 288
Location: Hungary
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| Posted: Wed Jan 25, 2006 4:57 am |
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Are you looking at random or sequential access? You can use the PIC's SPI port for sequential access.
Using parallel RAMs is also possible, but you'll have to use a lot of I/O ports. If you don't do any bus multiplexing, a 512K SRAM will cost you about 29 I/O pins. If you add some 8 bit latches, you can go down to about 15 I/O pins, although the use of multiplexed I/O will reduce read speeds to about what you'd get with a serial device. |
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Chicky
Joined: 04 Aug 2005
Posts: 21
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| Posted: Wed Jan 25, 2006 6:21 pm |
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hmmm... i think i'm looking at parallel access..
because i need a very fast processing time to send the data from RAM to the PC..
u see in the system; PIC will act like a middle person between the RAM and host (pc/PDA)... my PIC will need to read the data and send to PC through USB so that the pc can plot graphs in real time...
is there any suggestion on which type of Static RAM i can use? or similar project that i can refer to? |
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rwyoung
Joined: 12 Nov 2003
Posts: 563
Location: Lawrence, KS USA
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| Posted: Wed Jan 25, 2006 7:11 pm |
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Look at the 18F family to see if the varients with built in USB support can also access external RAM. Several of the 18F's have support for external address and data busses.
www.microchip.com
_________________
Rob Young
The Screw-Up Fairy may just visit you but he has crashed on my couch for the last month! |
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libor
Joined: 14 Dec 2004
Posts: 288
Location: Hungary
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| Posted: Thu Jan 26, 2006 5:48 am |
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Look at these two approaches, they all use IO port multiplexing with external latches to reduce the port count:
PIC - SRAM Extension with 32/64k SRAM
PIC - 256Kbyte SIMM RAM module interface
You can make it without the latches, just use all the required number of ports, this would be the simplest method in software.
What is your application? Perhaps you can make use of the many non-volatile NVRAM solutions (built-in lithium cell backed up SRAM in one DIP module] and many others: Dallas-Maxim memory products
I would also seriously consider interfacing to the standard Compact Flash memory cards or to the SD memory cards, so your can replace the memory module and read/write it with the PC also. Many such interface descriptions exist on the internet. (some as commercial products also) |
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Chicky
Joined: 04 Aug 2005
Posts: 21
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| Posted: Thu Jan 26, 2006 6:33 pm |
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Thx libor... i'll look up the options u gave...
FYI the actual system i'm working in consist of an adc and fpga; fpga will read the adc and write the results to RAM... my part is to use pic to read data on the ram and send it to usb port... |
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asmallri
Joined: 12 Aug 2004
Posts: 1635
Location: Perth, Australia
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| Posted: Thu Jan 26, 2006 7:45 pm |
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What is the sampling rate of the ADC? The application you have described so far sounds like a FRAM (SPI interface) will do this for you with significantly lower I/O requirement.
_________________
Regards, Andrew
http://www.brushelectronics.com/software
Home of Ethernet, SD card and Encrypted Serial Bootloaders for PICs!! |
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Chicky
Joined: 04 Aug 2005
Posts: 21
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| Posted: Thu Jan 26, 2006 8:51 pm |
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| The ADC sampling rate is not finalized yet... But it should be around 20 - 40 Mhz to avoid data loss |
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rwyoung
Joined: 12 Nov 2003
Posts: 563
Location: Lawrence, KS USA
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| Posted: Fri Jan 27, 2006 8:54 am |
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| Chicky wrote: | | The ADC sampling rate is not finalized yet... But it should be around 20 - 40 Mhz to avoid data loss |
I'm not trying to rain on your parade but there are a few things you REALLY need to consider (in no particular order, just dribbling out of my head)  :
20MSPS => 50ns/sample
Are you expecting to be able to stream data continuously from your ADC/FPGA into RAM and then out through a PIC & USB port to your USB host?
At first blush I don't think a PIC is going to be capable of this if new data arrives every 50ns, let alone 25ns for 40MSPS. How are you going to arbitrate access to the RAM between the PIC and FPGA? Single-port RAM with arbitration or building dual-port RAM or FIFO? By the way, if your FPGA is big enough and/or the RAM small enough, the RAM (single- or dual-port or FIFO) can be inside the FPGA.
But, if you are going to capture a fixed amount of data into the RAM and then after the full sweep is complete, stream it back to the USB host, then you might be OK.
However in a post above you mentioned plotting data in real time. I dont' think you will be able to accomplish "real time".
And have you figured out how to get the USB side working at a rate to support a 20MSPS data stream? You will need to use USB 2.0 High-Speed. Full-Speed (and definately not Low-Speed) won't cut it at that rate.
_________________
Rob Young
The Screw-Up Fairy may just visit you but he has crashed on my couch for the last month! |
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